1. Field of the Invention
The present invention relates to the field of microprocessor software. More particularly, the present invention relates to the field of a register reservation method for context switching in microprocessors.
2. Description of the Related Art
In microprocessors, registers are memory locations which are located on the microprocessor die and which are quickly accessible for data storage, retrieval, and manipulation. Microprocessors use a number of registers. A MIPS processor without a floating point coprocessor for example has 32 general purpose registers. In accordance with register conventions followed by most software compilers, these registers are assigned the functions described below:
______________________________________ Register Number Mnemonic Description ______________________________________ $0 zero Hardwired to zero $1 at Reserved for assembler $2-$3 v0-v1 Return value from functions $4-$7 a0-a3 Arguments for functions $8-$15 t0-t7 Temporaries, not preserved in functions $16-$23 s0-s7 Variables, preserved in functions $24-$25 ti-to Temporaries, not preserved in functions $26-$27 k0-k1 Reserved for exception processinq $28 gp Global pointer for fast addressing of global variables $29 sp Stack pointer $30 fp Frame pointer $31 ra Return address ______________________________________
The processor also has two special registers (HI and LO) used for multiplication and division operations.
Microprocessors also include interrupt capabilities. An interrupt input to a microprocessor is an input pin on the microprocessor chip itself. When a device external to the microprocessor drives the input pin to an active state (usually active low), the controller receives an immediate signal that a device is requesting service. The interrupt source requesting service might be a data port that has received incoming data, an A/D converter that has finished a conversion and therefore has data available for retrieval by the processor, an overtemperature alarm indicator, a mouse, a keyboard, or any other number of devices that need servicing by the processor. Interrupts can also be generated internally upon the occurrence of various conditions.
Interrupts are useful means to deviate the standard control flow of a program in order to service an external or internal event that may occur asynchronously. When an interrupt occurs, the processor temporarily abandons the current program flow and begins to fetch and execute instructions from a different location. This location may be either a static, predetermined address (non-vectored interrupts) or an address supplied by a hardware unit (vectored interrupts). The routine that the processor jumps to after receiving an interrupt is called an exception or interrupt routine or handler. The microprocessor can enable and disable interrupts via software. If an interrupt disable command has been executed, the microprocessor will not recognize the interrupt and jump to the interrupt routine until an interrupt enable command is executed.
When the processor jumps from the main (interrupted) program to the interrupt handler, the interrupt handler does not know what processor resources were being used by the main program. In order to prevent loss of the register data which the main program may have been using and to allow continuation of the main program after the interrupt has been handled and program execution returned to the main program, the interrupt handler has to save the data currently residing in the processor registers that it will be using and restore that data to those registers upon completion of the interrupt routine. The process of saving and restoring registers during exception handling is called context switching. Saving the registers at the beginning of the exception handler is called context saving. Restoring the registers before returning to the main program is called context restoring.
There are several different methods for performing context switching. Some processors, particularly digital signal processors (DSP's), perform context switching via shadow registers. In this method, for each main register there is an associated shadow register. A shadow register is a hardware location which is directly connected to the main register. The main registers are used during normal program execution. When an interrupt occurs, the shadow register contents are swapped with the main register contents and the interrupt handler proper may proceed immediately. Upon completion the main and shadow registers are swapped again and the interrupted program may resume.
This is the fastest interrupt handling method. However, not all processors support register shadowing. Also, due do a limited number of shadow registers, only a limited number of fast context switches may be performed.
A second method of context switching is software context save/restore. In this method, the main registers are saved via software commands at the beginning of an interrupt routine, and restored via software commands at the end of the interrupt routine. If the interrupt handler is being written in a high level programming language such as C which does not allow a programmer to specify which particular registers to use for the routine, an assembly wrapper as illustrated in FIG. 1 is invoked. The assembly wrapper simply saves and restores all of the registers. This is time-consuming. For example, the MIPS processor has 20 registers that must be saved and restored before and after the interrupt handler proper. This method will also be inefficient if the interrupt routine uses only a few registers. This inefficiency will be felt even more acutely if the interrupt routine is called often during program execution.
One variation on this method is to write the interrupt handler in assembly language so that the programmer can control which registers are used for the interrupt handler. The programmer adds register save and restore commands which save and restore only those registers that will be used during the exception routine. Although this is more efficient in terms of processor resources, writing software in assembly is significantly more time-consuming and error-prone than coding in a high level programming language such as C.
A third method of context switching is hardware context save/restore. In this method, hardware automatically performs the context save when the interrupt is accepted, and automatically performs the context restore at the end of the interrupt routine. Although typically faster than software controlled context switching, hardware context save/restore may also require a significant amount of time due to the number of registers to be saved. Furthermore, not all processors support hardware context switching.